View FAN8036_8283612.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

?2003 fairchild semiconductor corporation www.fairchildsemi.com rev. 1.0.1 features ? 4-ch balanced transformerless (btl) driver ? 1-ch (forward reverse) control dc motor driver ? operating supply voltage (4.5v ~ 13.2v) ? built in thermal shut down circuit (tsd) ? built in channel mute circuit ? built in power sa ve mode circuit ? built in tsd monitor circuit ? built in 2 regulators ? built in 2-op amps description the FAN8036 is a monolithic integrated circuit suitable for a 5-ch motor driver which drives the tracking actuator, focus actuator, sled motor, spindle motor, and tray motor of the cdp/car-cd/dvdp systems. 48-qfph-1414 typical application ? compact disk player ? video compact disk player ? car compact disk player ? digital video disk player ordering information device package operating temperature FAN8036l 48-qfph-1414 -35 c ~ +85 c FAN8036_nl 48-qfph-1414 -35 c ~ +85 c FAN8036 5-ch motor driver + 2-regulator
FAN8036 2 pin assignments out1 in1- fin (gnd) fin (gnd) 48 47 46 45 43 44 42 41 40 39 37 38 6 5 4 3 1 2 12 11 10 9 7 8 13 14 15 16 18 17 19 20 21 22 24 23 25 26 27 28 30 29 in2+ in2- out2 res1 regvcc regctl in3+ in3- out3 in4+ fin (gnd) in4- out4 ctl fwd rev mute123 mute4 tsd_m pvcc2 do5- do5+ pgnd2 do4- do4+ do3- do3+ 31 32 33 34 36 35 rego2 rego1 pgnd1 do2- do2+ do1- fin (gnd) do1+ pvcc1 opout2 opin2- opin2+ vref svcc opout1 opin1- opin1+ in1+ sgnd res2 FAN8036 ps
FAN8036 3 pin definitions pin number pin name i/o pin function descrition 1in1 ? i ch1 op-amp input ( ? ) 2 out1 o ch1 op-amp output 3 in2+ i ch2 op-amp input (+) 4in2 ? i ch2 op-amp input ( ? ) 5 out2 o ch2 op-amp output 6 res1 i regulator1 reset 7 res2 i regulator2 reset 8 regctl i regulator2 control voltage 9 in3+ i ch3 op-amp input (+) 10 in3 ? i ch3 op-amp input ( ? ) 11 out3 o ch3 op-amp output 12 in4+ i ch4 op-amp input (+) 13 in4 ? i ch4 op-amp input ( ? ) 14 out4 o ch4 op-amp output 15 ctl i ch5 motor speed control 16 fwd i ch5 forward input 17 rev i ch5 reverse input 18 sgnd - signal ground 19 mute123 i mute for ch1,2,3 20 mute4 i mute for ch4 21 ps i power save 22 tsd-m o tsd monitor 23 pvcc2 - power supply voltage 2 (for ch3,ch4,ch5) 24 do5 ? o ch5 drive ouptut ( ? ) 25 do5+ o ch5 drive output (+) 26 pgnd2 - power ground 2 (for ch3,ch4,ch5) 27 do4 ? o ch4 drive ouptut ( ? ) 28 do4+ o ch4 drive output (+) 29 do3 ? o ch3 drive ouptut ( ? ) 30 do3+ o ch3 drive output (+) 31 rego2 o regulator2 ouptut 32 rego1 o regulator1 ouptut
FAN8036 4 pin definitions (continued) pin number pin name i/o pin function descrition 33 pgnd1 - power ground 1 (for ch1, ch2) 34 do2 ? o ch2 drive ouptut ( ? ) 35 do2+ o ch2 drive output (+) 36 do1 ? o ch1 drive ouptut ( ? ) 37 do1+ o ch1 drive output (+) 38 pvcc1 - power supply voltage 1 (for ch1, ch2) 39 regvcc - regulator supply voltage( regulator1,2) 40 opout2 o normal op-amp2 output 41 opin2 ? i normal op-amp2 input ( ? ) 42 opin2+ i normal op-amp2 input (+) 43 vref i bias voltage input 44 svcc - signal & opamps supply voltage 45 opout1 o normal op-amp1 output 46 opin1 ? i normal op-amp1 input ( ? ) 47 opin1+ i normal op-amp1 input (+) 48 in1+ i ch1 op-amp intput (+)
FAN8036 5 internal block diagram mute4 mute123 out1 in1- fin (gnd) fin (gnd) 48 47 46 45 43 44 42 41 40 39 37 38 6 5 4 3 1 2 12 11 10 9 7 8 13 14 15 16 18 17 19 20 21 22 24 23 25 26 27 28 30 29 ps tsd_m regvcc tsd in2+ in2- out2 res1 regctl in3+ in3- out3 in4+ fin (gnd) in4- out4 ctl fwd rev mute123 mute4 tsd_m pvcc2 do5- do5+ pgnd2 do4- do4+ do3- do3+ 31 32 33 34 36 35 rego2 rego1 pgnd1 do2- do2+ do1- fin (gnd) do1+ pvcc1 regvcc opout2 opin2- opin2+ vref svcc opout1 opin1- opin1+ in1+ sgnd s w m s c + - d d regvcc res2 regvcc regvcc regvcc ps
FAN8036 6 equivalent circuits description pin no internal circuit btl input & op amp1 input 48,3,9,12,47 1,4,10,13,46 op amp2 input 41,42 vref 43 btl op amp out op amp1 out 2,5,11,14,45 vcc vcc 2k 2k 9 3 12 47 48 4 1 10 13 46 vcc 5k 5k 41 42 vcc 43 1k 1k 5k vcc vcc vcc vcc 5 11 45 2 14
FAN8036 7 equivalent circuits (continued) description pin no internal circuit op amp2 out 40 mute123,4 19,20 ctl 15 tsd-m 22 0.05k 40 vcc vcc 0.05k vcc 50k 50k 20k 19 20 15 vcc 1k 39k 22 20k
FAN8036 8 equivalent circuits (continued) description pin no internal circuit ps 21 fwd,rev 16,17 btl ch1,2,3,4 output 27,28,29,30, 34,35,36,37 btl ch5 output 24,25 50k 50k 100k 21 vcc vcc 16 30k 30k 17 30k 30k vcc 7k vcc 28 30 35 37 27 29 34 36 40k vcc parastic diode freewheeling diode vcc parastic diode freewheeling diode vcc 7k vcc 60k 25 24
FAN8036 9 equivalent circuits (continued) description pin no internal circuit rego1,2 31,32 res1,2 6,7 regctl 8 10k 39 31 regvcc 32 10k 10k 50k 50k 6 7 vcc 2k 10k 8 vcc vcc
FAN8036 10 absolute maximum ratings ( ta=25 c) note: 1. when mounted on the pcb of which size is 114mm 76mm 1.6mm. 2. power dissipation is derated with the rate of -24mw/ c for t a 25 c. 3. do not exceed p d and soa. recommended operating conditions ( ta=25 c) parameter symbol value unit maximum supply voltage svcc max 18 v pvcc1 18 v pvcc2 18 v regvcc 18 v power dissipation p d 3 note w operating temperature t opr ? 35 ~ +85 c storge temperature t stg ? 55 ~ +150 c maximum output current i omax 1a parameter symbol min. typ. max. unit operating supply voltage sv cc 4.5 - 13.2 v pv cc1 sv cc - 13.2 v pv cc2 sv cc - 13.2 v regv cc 7 - 13.2 v 3,000 2,000 1,000 0 0 25 50 75 100 125 150 175 pd (mw) ambient temperature, ta [ c]
FAN8036 11 electrical characteristics (sv cc =5v, pv cc1 = pv cc2 = 8v, t a = 25 c, unless otherwise specified) note : 1. when the voltage at pin 39 goes below 0.5v , the power save circuit makes the main bias current sour ces stop operating. as a result, the whole circuits are disable. ( the whole circuits mean the driver circ uit, the input op amp circuit, and the norma l op amp circuit.) 2. guaranteed field.(no eds/final test) parameter symbol conditions min. typ. max. unit quiescent circuit current i cc under no-load - 20 - ma power save on current i ps *note1 under no-load - - 1 ma power save on voltage v pson pin21 = variation - - 0.5 v power save off voltage v psoff pin21 = variation 2 - - v mute123 on voltage v mon123 pin19 = variation - - 0.5 v mute123 off voltage v moff123 pin19 = variation 2 - - v mute4 on voltage v mon4 pin20 = variation - - 0.5 v mute4 off voltage v moff4 pin20 = variation 2 - - v btl driver circuit output offset voltage v oo v in = 2.5v -100 - +100 mv maximum output voltage1 v om1 r l = 10 ?, ch1,2 4.5 6.0 - v maximum output voltage2 v om2 r l = 18 ?, ch3,4,5 5.5 6.5 - v closed-loop voltage gain a vf v in = 0.1vrms 16.8 18 19.2 db ripple rejection ratio *note2 rr v in = 0.1vrms, f = 120hz - 60 - db slew rate *note2 sr square, vout = 4vp-p 1 2 - v/ s input opamp circuit input offset voltage1 v of1 - -10 - +10 mv input bias current1 i b1 - - - 400 na high level output voltage1 v oh1 -4.44.7-v low level output voltage1 v ol1 --0.20.5v output sink current1 i sink1 r l = 50 ? 12 -ma output source current1 i sou1 r l = 50 ? 12 -ma common mode input range1 *note2 vicm1 - -0.3 - 4.0 v open loop voltage gain1 *note2 g vo1 v in = ? 75db - 80 - db ripple rejection ratio1 *note2 rr1 v in = ? 20db, f = 120hz - 65 - db common mode rejection ratio1 *note2 cmrr1 v in = ? 20db - 80 - db slew rate1 *note2 sr1 square, vout = 3vp-p - 1.5 - v/ s
FAN8036 12 electrical characteristics (continued) (sv cc = 5v, pv cc1 = pv cc2 = 8v, t a = 25 c, unless otherwise specified) note: guaranteed field.(no eds/final test) parameter symbol conditions min. typ. max. unit normal op amp circuit 1 input offset voltage 2 v of2 - -10 - +10 mv input bias current 2 i b2 - - - 400 na high level output voltage 2 v oh2 -4.44.7-v low level output voltage 2 v ol2 --0.20.5v output sink current 2 i sink2 r l = 50 ? 24 -ma output source current 2 i sou2 r l = 50 ? 24 -ma common mode input range 2 *note vicm2 - -0.3 - 4.0 v open loop voltage gain 2 *note g vo2 v in = ? 75db - 80 - db ripple rejection ratio 2 *note rr2 v in = ? 20db, f = 120hz - 65 - db common mode rejection ratio 2 *note cmrr2 v in = ? 20db - 80 - db slew rate 2 *note sr2 square, vout = 3vp-p - 1.5 - v/ s normal op amp circuit 2 input offset voltage 3 v of3 - -15 - +15 mv input bias current 3 i b3 - - - 400 na high level output voltage 3 v oh3 -33.8-v low level output voltage 3 v ol3 --1.01.5v output sink current 3 i sink3 r l = 50 ? 10 - - ma output source current 3 i sou3 r l = 50 ? 10 - - ma open loop voltage gain 3 *note g vo3 v in = ? 75db - 80 - db ripple rejection ratio 3 *note rr3 v in = ? 20db, f = 120hz - 65 - db common mode rejection ratio 3 *note cmrr3 v in = ? 20db - 80 - db slew rate 3 *note sr3 square, vout = 3vp-p - 1.5 - v/ s tray drive cirtuit input high level voltage v ih -2--v input low level voltage v il ---0.5v output voltage 1 v o1 pv cc2 = 8v, v ctl = 3v, r l = 45 ? -6-v output voltage 2 v o2 pv cc2 = 8v, v ctl = 1.5v, r l = 10 ? -3-v output load regulation ? v rl v ctl =3v, i l =100ma 400ma - 300 700 mv output offset voltage 1 v oo1 v in = 5v, 5v -40 - +40 mv output offset voltage 2 v oo2 v in = 0v, 0v -40 - +40 mv
FAN8036 13 electrical characteristics (continued) (sv cc = 5v, pv cc1 = pv cc2 = 8v, t a = 25 c, unless otherwise specified) note: guaranteed field.(no eds/final test) parameter symbol conditions min. typ. max. unit regulator1 circuit ( regvcc=8v ) load regulation ? v rl1 i l =0 200ma -80 0 0 mv line regulation ? v cc1 i l =200ma,v = 7v 9v -20 0 +30 mv regulator output voltage 1 v reg1 i l =100ma 4.75 5.0 5.25 v regulator reset on voltage 1 reson1 pin6=variation - - 0.5 v regulator reset off voltage 1 resoff1 pin6=variation 2 - svcc v ripple rejection 1 *note rr1 vin=1vp-p, f=120hz - 55 - db regulator2 circuit ( regvcc=8v ) load regulation ? v rl2 i l =0 200ma -80 0 0 mv line regulation ? v cc2 i l =200ma,v = 7v 9v -20 0 +30 mv regulator output voltage 2 range v reg2r i l =100ma 1.5 - 4.5 v regulator output voltage 2 v reg2 i l =100ma,v regctl =0v 1.482 1.56 1.638 v i l =100ma,v regctl =1.9v 3.135 3.3 3.465 v regulator reset on voltage 2 reson2 pin7=variation - - 0.5 v regulator reset off voltage 2 resoff2 pin7=variation 2 - svcc v control gain g regctl - 0.75 0.95 1.15 v/v ripple rejection 2 *note rr2 vin=1vp-p, f=120hz - 55 - db
FAN8036 14 application information 1. thermal shutdown ? the tsd circuit is activated at the junction temperature of 160 c and deactivated at 135 c with the hysteresis of 25 c . during the thermal shutdown, the tsd circuit keeps all the output driver off. 2. ch mute function ? when the mute pin is high, the tr q1 is on and q2 is off, so the bias circuit is enabled. when the mute pin is low (gnd), the tr q1 is off and q2 is on, so the bias circuit is disabled. ? during the mute on state, all the circuit blocks except for the variable regulator remain off, and the low power quiescent state is established. ? truth table is as follows; 3. power save function ? when the pin21 is high, the tr q3 becomes on and q4 off, so the bias circuit is enabled. when the pin21 is low (gnd) , the tr q3 becomes off and q4 is on, so the bias circuit is disabled. ? during the power save on state, this function keeps all the circuit blocks off, and the low power quiescent state is established. ? truth table is as follows; 4. tds monitor function ? pin 22 is tsd monitor pin, which detects the state of the tsd block and generates the tsd-monitor signal. ? in the normal state q5 is on, and q6 is off. when the tsd block is activated q5 becomes off, and thus the voltage of pin22 keeps low. ? truth table is as follows; pin 19, 20 mute high mute-off low mute-on pin21 power save high power save off low power save on tsd pin22 tsd off high tsd on low output driver bias q0 svcc iref hysteresis r1 r2 r3 ihys bias blocks (4-ch btl) q1 q2 svcc mute 20 19 main bias q3 q4 svcc 21 q5 q6 svcc 20k vcc r(external) 22
FAN8036 15 5. focus, tracking actuator, sp indle, sled motor drive part ? the vref at pin 43 is for eliminating the dc components from the input signals and can set by an exteranl circuit. ? the voltage gain from vin to output is as follows ; ?where ? v means just ac component. ? the total input to output voltage gain is the sum of the input op amp network gain and 18db. ? the output stage is the balanced transformerless (btl) driver. ? the bias voltage vp is expressed as ; m 10k 10k 10k 10k 40k 60k 62k do+ do- pvcc1(pvcc2) 40k 40k 40k vref in+ in- out vin 48 1 3 4 9 10 12 13 2 5 11 14 43 37 36 35 34 30 29 28 27 vp vp v dp + - q p vin vref v ? + = dop v d 4v ? + = don v d 4 ? v ? = vout dop don 8 v ? = ? = gain 20 vout v ? ------------ - log 20 8 log 18db = == v p pvcc1 v dp ? v cesat q p ? () 62k 60k 62k + ------------------------- - v cesat q p + = pvcc1 v dp ? v cesat q p ? 1.97 ------------------------------------------------------------------------- - = v cesat q p + - - - - - - - - - - (1)
FAN8036 16 6. tray, changer,panel motor drive part ? rotational direction control the forward and reverse rotational direction is controlled by fwd (pin16) and rev (pin17) and the input conditions are as follows; ? where vp(power reference voltage) is approximately 3.75v at pv cc2 =8v according to equation (1). ? motor speed control (when sv cc =5v, pv cc2 =8v) - the maximum torque is obtained when the pin15(ctl) is open. - if the voltage of the pin15 (ctl) is 0v, the motor will not operate. - when the control voltage (pin15) is between 0 and 3.0v, the differential output voltage v(out1,out2) is about two times of control voltage. the output gain is 6db. - when the control voltage is greater than 3.0v, the output vo ltage is saturated at the 6.0v because of the output swing limitation. input output fwd rev out 1 out 2 state h h vp vp brake hlhlforward l h l h reverse l l - - hign impedance m 24 25 out 1 out 2 d level shift m.s.c s.w d ctl in fwd rev in 16 17 15 v(out1,out2) v ctl 0 6.0v 3.0v
FAN8036 17 7. regulator1 part ? the output voltage of the regulator1 is fixed to 5v. ? when power save on or tsd on, regulator1 is disabled. ? truth table is as follows; res1(pin6) rego1 high active low deactive regvcc 2.5v res1 rego1 10k 10k 33uf 6 39 32 regvcc r1 r2 vref1
FAN8036 18 8. regulator2 part ? the output of the regulator2 is variable. ? the input impedance of the regctl pin is 50k ? . ? the regctl input circuit is as follows; ? the output voltage(vrego2) is decided as follows; ? when the regctl pin is connect to the ground or open, the regulator output voltage becomse1.56v. ? when power save on or tsd on, regulator2 is disabled. ? truth table is as follows; res2(pin7) rego2 high active low deactive rego2 1.56v 4.2v regctl 0.3v 1.77v gain=0.95 regvcc 2.5v res2 rego2 10k 40k 33uf 7 39 31 regvcc 8 regctl r3 r4 vref2 50k vcc 8 regctl r1 r2 FAN8036 95 . 0 ) 56 . 1 ( 2 + = regctl v v vrego
FAN8036 19 test circuits do2+ pgnd1 rego1 do1- do2- vref svcc opin1- opout1 in1+ opin1+ do1+ opout2 ps opin2+ opin2- pvcc1 out1 in1- in2+ in2- out2 res1 in4+ regvcc regctl res2 in3- out3 ctl sgnd in4- fwd rev out4 do3+ do3- pgnd2 do4+ do4- do5+ mute123 do5- tsd-m mute4 pvcc2 1 2 3 4 5 6 48 47 46 45 44 43 42 40 39 38 41 37 36 35 34 33 32 31 30 28 27 26 29 25 13 14 15 16 17 18 19 21 22 23 20 24 7 8 9 10 11 12 FAN8036 op-amp in+ in- out op-amp in+ in- out op-amp in+ in- out op-amp in+ in- out vref vcc rl1 rl2 rl3 rl4 rl5 op-amp in+ in- out vcc v ac v pulse v dc v a rl v b sw1 sw2 sw3 sw4 pvcc1 op-amp in+ in- out op-amp in+ in- out v ctl v fwd v rev in3+ rego2 v regctl pvcc2 v res2 v res1 il1 il2 regvcc v mu123 v mu4 v ps
FAN8036 20 typical application circuits 1 [voltage control mode] [servo pre amp] vcc pvcc2 m m focus trackin g spindle tray pvcc1 vref focus input tracking input sled input spindle input m sled svcc in1- out1 in2+ in2- out2 res1 FAN8036 30 29 28 27 26 25 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 res2 regctl in3+ in3- out3 in4+ in4- out4 ctl fwd rev sgnd mute123 mute4 ps tsd_m pvcc2 do5- do3+ do3- do4+ do4- pgnd2 do5+ do1- do2+ do2- pgnd1 rego1 rego2 opin2+ opin2- opout2 regvcc pvcc1 do1+ in1+ opin1+ opin1- opout1 svcc vref 1 2 3 4 5 6 7 8 9 10 11 12 rego2 rego1 [controller] tray control tray input spindle mute focus tracking sled mute tsd_m power save reg1 reset reg2 reset vcc regvcc
FAN8036 21 typical application circuits 2 [ differential pwm control mode ] notes: radiation pin is connected to t he internal gnd of the package. m rego2 rego1 vcc vcc pvcc2 m focus tracking sled spindle tray pvcc1 svcc vref focus input tracking input sled input spindl e input in1- out1 in2+ in2- out2 res1 FAN8036 30 29 28 27 26 25 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 res2 regctl in3+ in3- out3 in4+ in4- out4 ctl fwd rev sgnd mute123 mute4 ps tsd_m pvcc2 do5- do3+ do3- do4+ do4- pgnd2 do5+ do1- do2+ do2- pgnd1 rego1 rego2 opin2+ opin2- opout2 regvcc pvcc1 do1+ in1+ opin1+ opin1- opout1 svcc vref 1 2 3 4 5 6 7 8 9 10 11 12 m [servo pre amp] regvcc tray control tray input spindle mute focus tracking sled mute tsd_m power save [controller] reg1 reset reg2 reset
FAN8036 22 mechanical dimensions package #1 #48 (0.825) 17.20 0.30 (4.85) 0.10max 0.65 14.00 0.20 17.20 0.30 14.00 0.20 + 0.10 -0.05 0.30 0.80 0.20 0.10max 2.60 0.10 3.00max 0.00~0.25 0~8 + 0.10 -0.05 0.20 48-qfph-1414
FAN8036 5/22/03 0.0m 001 stock#dsxxxxxxxx ? 2003 fairchild semiconductor corporation life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain li fe, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others.

▲Up To Search▲

Price & Availability of FAN8036

	To Download FAN8036 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .